Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA)
Abstract
The aim of this study is to implement an algorithm for face recognition, based on fast fourier transform (FFT), on the field programmable gate array (FPGA) chip. Implemented program included the initialization process of two single-IP-core ROM blocks, each with an image of a human face, which are sent to the real components of two-channel IP CoreFFT block. The result of classification could be displayed in the form of either a word "yes" or "no" on the seven-segment display or the information about the reference to the folder with the found match face. Due to the lack of memory on the chip, the results are discussed based on the results obtained by the simulation, whilst the implemented part of the system included displaying images on VGA monitor and result of the algorithm shown on seven-segment display or realized as a software solution in Matlab. The results show 79% accuracy and the advantage of presented system lies in the possibility of working with images in real time. The resul...ts obtained in this study can be a good starting point in the implementation of complex algorithms for face recognition using all the benefits that FPGAs offer.
Keywords:
Face recognition / field programmable gate array (FPGA) / Xilinx IP core / fast fourier transform (FFT) / real-time image processingSource:
Journal of Circuits Systems and Computers, 2019, 28, 8Publisher:
- World Scientific Publ Co Pte Ltd, Singapore
Funding / projects:
- Application of biomedical engineering for preclinical and clinical practice (RS-MESTD-Integrated and Interdisciplinary Research (IIR or III)-41007)
- Multiscale Methods and Their Applicatios in Nanomedicine (RS-MESTD-Basic Research (BR or ON)-174028)
DOI: 10.1142/S0218126619501299
ISSN: 0218-1266
WoS: 000477880200007
Scopus: 2-s2.0-85053185174
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Institution/Community
Geografski fakultetTY - JOUR AU - Sustersić, Tijana AU - Peulić, Aleksandar PY - 2019 UR - https://gery.gef.bg.ac.rs/handle/123456789/972 AB - The aim of this study is to implement an algorithm for face recognition, based on fast fourier transform (FFT), on the field programmable gate array (FPGA) chip. Implemented program included the initialization process of two single-IP-core ROM blocks, each with an image of a human face, which are sent to the real components of two-channel IP CoreFFT block. The result of classification could be displayed in the form of either a word "yes" or "no" on the seven-segment display or the information about the reference to the folder with the found match face. Due to the lack of memory on the chip, the results are discussed based on the results obtained by the simulation, whilst the implemented part of the system included displaying images on VGA monitor and result of the algorithm shown on seven-segment display or realized as a software solution in Matlab. The results show 79% accuracy and the advantage of presented system lies in the possibility of working with images in real time. The results obtained in this study can be a good starting point in the implementation of complex algorithms for face recognition using all the benefits that FPGAs offer. PB - World Scientific Publ Co Pte Ltd, Singapore T2 - Journal of Circuits Systems and Computers T1 - Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA) VL - 28 IS - 8 DO - 10.1142/S0218126619501299 UR - https://hdl.handle.net/21.15107/rcub_gery_972 ER -
@article{ author = "Sustersić, Tijana and Peulić, Aleksandar", year = "2019", abstract = "The aim of this study is to implement an algorithm for face recognition, based on fast fourier transform (FFT), on the field programmable gate array (FPGA) chip. Implemented program included the initialization process of two single-IP-core ROM blocks, each with an image of a human face, which are sent to the real components of two-channel IP CoreFFT block. The result of classification could be displayed in the form of either a word "yes" or "no" on the seven-segment display or the information about the reference to the folder with the found match face. Due to the lack of memory on the chip, the results are discussed based on the results obtained by the simulation, whilst the implemented part of the system included displaying images on VGA monitor and result of the algorithm shown on seven-segment display or realized as a software solution in Matlab. The results show 79% accuracy and the advantage of presented system lies in the possibility of working with images in real time. The results obtained in this study can be a good starting point in the implementation of complex algorithms for face recognition using all the benefits that FPGAs offer.", publisher = "World Scientific Publ Co Pte Ltd, Singapore", journal = "Journal of Circuits Systems and Computers", title = "Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA)", volume = "28", number = "8", doi = "10.1142/S0218126619501299", url = "https://hdl.handle.net/21.15107/rcub_gery_972" }
Sustersić, T.,& Peulić, A.. (2019). Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA). in Journal of Circuits Systems and Computers World Scientific Publ Co Pte Ltd, Singapore., 28(8). https://doi.org/10.1142/S0218126619501299 https://hdl.handle.net/21.15107/rcub_gery_972
Sustersić T, Peulić A. Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA). in Journal of Circuits Systems and Computers. 2019;28(8). doi:10.1142/S0218126619501299 https://hdl.handle.net/21.15107/rcub_gery_972 .
Sustersić, Tijana, Peulić, Aleksandar, "Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA)" in Journal of Circuits Systems and Computers, 28, no. 8 (2019), https://doi.org/10.1142/S0218126619501299 ., https://hdl.handle.net/21.15107/rcub_gery_972 .