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The remote lab "Nexys 2 FPGA platform" aimed for learning design of digital circuits
dc.creator | Luković, Vanja | |
dc.creator | Krneta, Radojka | |
dc.creator | Damnjanović, Đorđe | |
dc.creator | Peulić, Aleksandar | |
dc.date.accessioned | 2021-09-24T15:37:26Z | |
dc.date.available | 2021-09-24T15:37:26Z | |
dc.date.issued | 2017 | |
dc.identifier.issn | 2376-631X | |
dc.identifier.uri | https://gery.gef.bg.ac.rs/handle/123456789/831 | |
dc.description.abstract | The application of remote lab "Nexys 2 FPGA platform" for learning digital circuits design is described in this paper. The experiment requires installation of Xilinx ISE Design Suite software on students' PCs for designing digital circuits and generating. bit file. There are three ways of designing digital circuits in Xilinx ISE Design Suite software: by programming in VHDL language, by programming in Verilog language or by using schematic diagrams. Working environment of the remote lab consists of Digilent Nexys 2 FPGA platform that is connected with PC. Students connect with the remote lab PC through CEyeClon viewer which also needs to be installed on their PCs together with. Net Framework 4.5. Generated. bit file is loaded through Digilent Adept2 software that is installed on the remote lab PC and used for the FPGA programming. The usage of this experiment enable engineering students to achieve practical experiences and skills for designing and simulating digital circuits using FPGA and to better understand and learn theory of designing digital circuits. | en |
dc.publisher | IEEE, New York | |
dc.relation | Education, Audiovisual and Culture Executive Agency (EACEA) [543667-TEMPUS-1-2013-1-RS-TEMPUS-JPHES] | |
dc.rights | restrictedAccess | |
dc.source | Proceedings of 4th Experiment"International Conference (EXP.At'17) | |
dc.subject | designing | en |
dc.subject | simulating | en |
dc.subject | digital circuits | en |
dc.subject | Nexys 2 platform | en |
dc.subject | remote experiment | en |
dc.subject | FPGA | en |
dc.subject | Xilinx ISE Design Suite | en |
dc.title | The remote lab "Nexys 2 FPGA platform" aimed for learning design of digital circuits | en |
dc.type | conferenceObject | |
dc.rights.license | ARR | |
dcterms.abstract | Крнета, Радојка; Пеулић, Aлександар; Дамњановић, Ђорђе; Луковић, Вања; | |
dc.citation.spage | 101 | |
dc.citation.epage | 102 | |
dc.citation.other | : 101-102 | |
dc.identifier.wos | 000412842600022 | |
dc.identifier.scopus | 2-s2.0-85027848069 | |
dc.identifier.rcub | https://hdl.handle.net/21.15107/rcub_gery_831 | |
dc.type.version | publishedVersion |
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